New NXP S32K5 family of MCUs speeds up transition to software defined vehicles

Automakers are embracing zonal architectures with diverse approaches to the distribution and integration of electronic control unit (ECU) functions. In March 2025, NXP Semiconductors N.V. unveiled its S32K5 family of automotive microcontrollers (MCUs), the automotive industry’s first 16nm FinFET MCU with embedded magnetic RAM (MRAM).

It is designed to help automakers transition to software-defined vehicles (SDVs) using scalable zonal architectures and pre-integrated solutions. The S32K5 features advanced real-time performance, low-latency communication, and enhanced safety measures, making it suitable for managing electronic control unit (ECU) functions securely.

Automotive Industries (AI) asked David Vieira, Sr. Director, Automotive MCU Zonal Segment at NXP, how the S32K5 family will help automakers and Tier-1s accelerate the development of zonal architectures.

Vieira: Zonal architecture really spans a spectrum of solutions, from compute and applications run entirely in zones, to a model where some vehicle architectures look to centralize application and control compute.

In between these extremes, there is a wide range of approaches, combining central compute with zonal integration to simplify cross-domain ECU structures of legacy vehicles.

Although there is a diversity of approaches, we developed the S32K5 architecture to address challenges that are common across the spectrum. One of these is the diversity of workload where, for example, the same MCU supports safety-critical applications like ADAS and braking, along with non-critical functions like window lifts.

With the proliferation of sensors, there is more and more data being moved around, which results in latency or performance sensitivity within the network. Increasing bandwidth to cater to the increased traffic does not necessarily address latency.

We believe the solution to the vehicle network lies in consistent and predictable performance rather than speed.

Another key goal for the SDV is serviceability – being able to guarantee application performance, update ability and security. One of the biggest challenges here is updating the software that is being deployed in different localities in a vehicle.

On the consumer side, this is actually part of the driver’s experience. While things like network challenges are largely hidden from the driver, software updates are not, and OEMs have to ensure that updates are both secure and not intrusive.

Drivers do not want to be faced with updates that take 45 minutes. Three or four minutes may be acceptable. A key engineering advancement in the S32K5 is the on-chip high-performance MRAM, which accelerates ECU programming times both during manufacturing and for over-the-air updates.

There is also the evolving issue of security, and we have post-quantum cryptography (PQC) built into the S32K5 device family. This provides futureproofing for increasingly sophisticated attacks.

Another common challenge is what we might call “software sprawl.” OEMs have to manage software in numerous locations. Integrating and managing that software takes a lot of work and time.

The CoreRide software-defined vehicle platform aims to take as much of the effort and costs from the OEMs through pre-testing and pre-integrating software. This allows OEMs to focus on developing the features and applications that the customers experience.

AI: Please tell us a bit more about latency.

Vieira: There are different ways to address communication latency. NXP addresses latency in vehicle Ethernet through various solutions, including integrated Ethernet TSN switching, low-latency communication engines (LLCE), and optimized ethernet PHYs like the TJA1101B, ensuring reliable and efficient data transmission for time-sensitive applications.

The S32K5 features advanced real-time performance, low-latency communication, and enhanced safety measures, making it suitable for managing electronic control unit (ECU) functions securely.

An integrated ethernet switch core shared with NXP’s S32N processor family facilitates streamlined network design and software reuse.

These MCUs also include dedicated accelerators for CAN-Ethernet network translation, security, and digital signal processing workloads.

AI: Does the S32K5 family guarantee MCU performance without sacrificing safety, efficiency, and isolation essential for zonal solutions?

Vieira: The S32K5 microcontrollers implement a software-defined, hardware-enforced isolation architecture that enables safe and secure partitioning, similar to what is offered in other NXP S32 devices. This enables us to support a large number of domains in a single hardware device.

We refer to it as “core-to-pin” isolation. Software-defined domains may each have specific CPU, memory, and peripheral resources, down to specific pins, which isolate the resources to each domain and act as a firewall to ensure freedom from interference from other functions on the device.

The higher end of the S32K5 device family will also feature R52 ARM cores which will enable a hypervisor to be used to implement another type of function in isolation. A hypervisor requires more system resources, but adds flexibility. The use case will determine the right approach.

AI: How does the new family combine leading-edge core performance with embedded MRAM memory and does that mean ECU consolidation without sacrificing latency or efficiency?

Vieira: The M7 cores and R52 cores can run at speeds of up to up to 800 megahertz, which gives us the performance and ability to run more applications on one MCU without sacrificing application performance.

Our approach to the S32K5 architecture is not to just add more cores, because that can create problems on its own. We see that certain applications run better and more efficiently on an optimized compute element.

For example, digital signal processors (DSPs) are ideal for workloads such as audio processing, noise cancellation, and road noise cancellation.

S32K5 also includes a very low-power processor subsystem to minimize the drain on the vehicle battery when the vehicle is in standby mode. Various standby functions such as key fob or motion detection could be run in the sub-100 micro-amp range.

We are able to do that thanks, in part, to the 16 nm FinFET technology, which gives us the ability to offer a lot of functionality and peripheral control in that low power state.

AI: Does the S32K5 also feature a dedicated eIQ® Neutron neural processing unit (NPU)?

Vieira: Yes, NXP’s scalable machine learning accelerator enables machine learning algorithms to perform power-efficient, real-time processing of sensor data at the vehicle’s edge and supports many neural network types.

AI: Does NXP’s scalable machine learning accelerator enable machine learning algorithms to perform power-efficient, real-time processing of sensor data at the vehicle edge?

Vieira: That is the goal. For example, we are developing use cases for virtual passenger sensors using machine learning algorithms with existing sound and vision sensors within a vehicle

AI: Is the pre-integrated software and reference solutions from partner ecosystem reducing lifecycle cost?

Vieira: Bringing in an ecosystem of middleware and OS partners contributes to the simplification and streamlining of the integration portion of the development cycle, which is a significant cost component of the life cycle for OEMs.

Automakers are at different stages. Some have relatively new platforms, and others are still working with legacy systems, although the sector is evolving rapidly. They need to simplify and shorten their route to market to stay competitive with the newer companies that do not have legacy baggage.

AI: When do you expect the S32K5 to begin sampling with lead customers?

Vieira: We will be sampling that in the third quarter of this year.

AI: What is next for NXP?

Vieira: Machine learning and artificial intelligence are a very big focus for us, clearly, which I am very excited about. I spent some time in the earlier days of AI in the data center space, and it is fascinating to see how AI use cases drive innovation into the very architectures that they run on.

The vehicle network will also continue to evolve. NXP has a full range of networking devices, from end nodes to high end application processors. So, we have the ability to deploy our IP and our solutions very broadly. When we go to a customer and say, “we have this scalable solution,” we can back up the claim.